This book constitutes the refereed proceedings of the 8th International Workshop on OpenMP, held in in Rome, Italy, in June 2012. The 18 technical full papers presented together with 7 posters were carefully reviewed and selected from 30 submissions. The papers are organized in topical sections on proposed extensions to OpenMP, runtime environments, optimization and accelerators, task parallelism, validations and benchmarks

This book introduces Open Core Protocol (OCP) not as a conventional hardware communications protocol but as a meta-protocol: a means for describing and capturing the communications requirements of an IP core, and mapping them to a specific set of signals with known semantics. Readers will learn the capabilities of OCP as a semiconductor hardware interface specification that allows different System-On-Chip (SoC) cores to communicate. The OCP methodology presented enables intellectual property designers to design core interfaces in standard ways. This facilitates reusing OCP-compliant cores across multiple SoC designs which, in turn, drastically reduces design times, support costs, and overall cost for electronics/SoCs."

The book presents the state of the art in high-performance computing and simulation on modern supercomputer architectures. It covers trends in hardware and software development in general, and the future of high-performance systems and heterogeneous architectures specifically. The application contributions cover computational fluid dynamics, material science, medical applications and climate research. Innovative fields like coupled multi-physics or multi-scale simulations are also discussed. All papers were chosen from presentations given at the 20th Workshop on Sustained Simulation Performance in December 2014 at the HLRS, University of Stuttgart, Germany, and the subsequent Workshop on Sustained Simulation Performance at Tohoku University in February 2015.

This monograph presents examples of best practices when combining bioinspired algorithms with parallel architectures. The book includes recent work by leading researchers in the field and offers a map with the main paths already explored and new ways towards the future. Parallel Architectures and Bioinspired Algorithms will be of value to both specialists in Bioinspired Algorithms, Parallel and Distributed Computing, as well as computer science students trying to understand the present and the future of Parallel Architectures and Bioinspired Algorithms.

This book constitutes thoroughly refereed post-conference proceedings of the workshops of the 17th International Conference on Parallel Computing, Euro-Par 2011, held in Bordeaux, France, in August 2011. The papers of these 12 workshops CCPI, CGWS, HeteroPar, HiBB, HPCVirt, HPPC, HPSS HPCF, PROPER, CCPI, and VHPC focus on promotion and advancement of all aspects of parallel and distributed computing.

This book constitutes thoroughly refereed post-conference proceedings of the workshops of the 17th International Conference on Parallel Computing, Euro-Par 2011, held in Bordeaux, France, in August 2011. The papers of these 12 workshops CCPI, CGWS, HeteroPar, HiBB, HPCVirt, HPPC, HPSS HPCF, PROPER, CCPI, and VHPC focus on promotion and advancement of all aspects of parallel and distributed computing.

In three main divisions the book covers combinational circuits, latches, and asynchronous sequential circuits. Combinational circuits have no memorising ability, while sequential circuits have such an ability to various degrees. Latches are the simplest sequential circuits, ones with the shortest memory. The presentation is decidedly non-standard. The design of combinational circuits is discussed in an orthodox manner using normal forms and in an unorthodox manner using set-theoretical evaluation formulas relying heavily on Karnaugh maps. The latter approach allows for a new design technique called composition. Latches are covered very extensively. Their memory functions are expressed mathematically in a time-independent manner allowing the use of (normal, non-temporal) Boolean logic in their calculation. The theory of latches is then used as the basis for calculating asynchronous circuits. Asynchronous circuits are specified in a tree-representation, each internal node of the tree representing an internal latch of the circuit, the latches specified by the tree itself. The tree specification allows solutions of formidable problems such as algorithmic state assignment, finding equivalent states non-recursively, and verifying asynchronous circuits.

This book presents the state-of-the-art in simulation on supercomputers. Leading researchers present results achieved on systems of the Gauss-Allianz, the association of High-Performance Computing centers in Germany. The reports cover all fields of computational science and engineering, ranging from CFD to Computational Physics and Biology to Computer Science, with a special emphasis on industrially relevant applications. Presenting results for large-scale parallel microprocessor-based systems and GPU and FPGA-supported systems, the book makes it possible to compare the performance levels and usability of various architectures. Its outstanding results in achieving the highest performance for production codes are of particular interest for both scientists and engineers. The book includes a wealth of color illustrations and tables.

This book constitutes the refereed proceedings of the 8th International Symposium on Reconfigurable Computing: Architectures, Tools and Applications, ARC 2012, held in Hongkong, China, in March 2012. The 35 revised papers presented, consisting of 25 full papers and 10 poster papers were carefully reviewed and selected from 44 submissions. The topics covered are applied RC design methods and tools, applied RC architectures, applied RC applications and critical issues in applied RC.

Systems Architecture, 6e, International Edition is the most comprehensive introduction to information systems hardware and software in business. This new edition remains an indispensable tool for IS students, emphasizing a managerial, broad systems perspective for a holistic approach to systems architecture. Each chapter has been updated thoroughly to reflect the changing nature of new technologies, and all end-of-chapter material has been enhanced and expanded.

This book presents techniques for energy reduction in adaptive embedded multimedia systems, based on dynamically reconfigurable processors. The approach described will enable designers to meet performance/area constraints, while minimizing video quality degradation, under various, run-time scenarios. Emphasis is placed on implementing power/energy reduction at various abstraction levels. To enable this, novel techniques for adaptive energy management at both processor architecture and application architecture levels are presented, such that both hardware and software adapt together, minimizing overall energy consumption under unpredictable, design-/compile-time scenarios.

This book addresses Software-Defined Radio (SDR) baseband processing from the computer architecture point of view, providing a detailed exploration of different computing platforms by classifying different approaches, highlighting the common features related to SDR requirements and by showing pros and cons of the proposed solutions. It covers architectures exploiting parallelism by extending single-processor environment (such as VLIW, SIMD, TTA approaches), multi-core platforms distributing the computation to either a homogeneous array or a set of specialized heterogeneous processors, and architectures exploiting fine-grained, coarse-grained, or hybrid reconfigurability.

This book constitutes the refereed proceedings of the International conference on Parallel and Distributed Computing and Networks, PDCN 2011, held in Chongqing, China, in December 2010. The 19 revised full papers presented were carefully reviewed and selected from numerous submissions. The conference provided a forum for participants from industry, academic, and non-profit organizations to exchange innovative ideas on Parallel and Distributed Computing and Networks related technologies. The papers address current issues in distributed, parallel, ubiquitous, and cloud computing with special focus on systems security, healthcare, and sports economics.

This book constitutes the refereeds proceedings of the International Conference on High Performance Architecture and Grid Computing, HPAGC 2011, held in Chandigarh, India, in July 2011. The 87 revised full papers presented were carefully reviewed and selected from 240 submissions. The papers are organized in topical sections on grid and cloud computing; high performance architecture; information management and network security.

This book introduces a novel design methodology which can significantly reduce the ASIP development effort through high degrees of design automation. The key elements of this new design methodology are a powerful application profiler and an automated instruction-set customization tool which considerably lighten the burden of mapping a target application to an ASIP architecture in the initial design stages. The book includes several design case studies with real life embedded applications to demonstrate how the methodology and the tools can be used in practice for accelerating the overall ASIP design process.

This book is concerned with studying the co-design methodology in general, and how to determine the more suitable interface mechanism in a co-design system in particular. This is based on the characteristics of the application and those of the target architecture of the system. Guidelines are provided to support the designer's choice of the interface mechanism. Some new trends in co-design and system acceleration are also introduced.

Recon?gurable computing (RC) systems have generated considerable interest in the embedded and high-performance computing communities over the past two decades, with ?eld programmable gate arrays (FPGAs) as the leading techn- ogy at the helm of innovation in this discipline. Achieving orders of magnitude performance and power improvements using FPGAs over traditional microp- cessorsis not uncommon for well-suitedapplications. But even with two decades of research and technological advances, FPGA design still presents a subst- tial challenge and often necessitates hardware design expertise to exploit its true potential. Although the challenges to address the design productivity - sues are steep, the promise and the potential of the RC technology in terms of performance, power, size, and versatility continue to attract application design engineers and RC researchers alike. The International Symposium on Applied Recon?gurable Computing (ARC) aims to bring together researchers and practitioners of RC systems with an emphasis on practical applications and design methodologies of this promising technology. This year's ARC symposium (The sixth ARC symposium) was held in Bangkok, Thailand during March 17-19, 2010, and attracted papers in three primary focus areas:RC applications, RC architectures, and RC design meth- ologies.

Dynamic Reconfigurable Architectures and Transparent Optimization Techniques presents a detailed study on new techniques to cope with the aforementioned limitations. First, characteristics of reconfigurable systems are discussed in details, and a large number of case studies is shown. Then, a detailed analysis of several benchmarks demonstrates that such architectures need to attack a diverse range of applications with very different behaviours, besides supporting code compatibility. This requires the use of dynamic optimization techniques, such as Binary Translation and Trace reuse. Finally, works that combine both reconfigurable systems and dynamic techniques are discussed and a quantitative analysis of one them, the DIM architecture, is presented.

The Comprehensive, Proven Approach to IT Scalability-Updated with New Strategies, Technologies, and Case Studies In The Art of Scalability, Second Edition, leading scalability consultants Martin L. Abbott and Michael T. Fisher cover everything you need to know to smoothly scale products and services for any requirement. This extensively revised edition reflects new technologies, strategies, and lessons, as well as new case studies from the authors' pioneering consulting practice, AKF Partners. Writing for technical and nontechnical decision-makers, Abbott and Fisher cover everything that impacts scalability, including architecture, process, people, organization, and technology. Their insights and recommendations reflect more than thirty years of experience at companies ranging from eBay to Visa, and Salesforce.com to Apple. You'll find updated strategies for structuring organizations to maximize agility and scalability, as well as new insights into the cloud (IaaS/PaaS) transition, NoSQL, DevOps, business metrics, and more. Using this guide's tools and advice, you can systematically clear away obstacles to scalability-and achieve unprecedented IT and business performance. Coverage includes * Why scalability problems start with organizations and people, not technology, and what to do about it * Actionable lessons from real successes and failures * Staffing, structuring, and leading the agile, scalable organization * Scaling processes for hyper-growth environments * Architecting scalability: proprietary models for clarifying needs and making choices-including 15 key success principles * Emerging technologies and challenges: data cost, datacenter planning, cloud evolution, and customer-aligned monitoring * Measuring availability, capacity, load, and performance

Dynamically Reconfigurable Systems is the first ever to focus on the emerging field of Dynamically Reconfigurable Computing Systems. While programmable logic and design-time configurability are well elaborated and covered by various texts, this book presents a unique overview over the state of the art and recent results for dynamic and run-time reconfigurable computing systems.

Reconfigurable hardware is not only of utmost importance for large manufacturers and vendors of microelectronic devices and systems, but also a very attractive technology for smaller and medium-sized companies. Hence, Dynamically Reconfigurable Systems also addresses researchers and engineers actively working in the field and provides them with information on the newest developments and trends in dynamic and run-time reconfigurable systems.

This book constitutes the refereed proceedings of the 16th European PVM/MPI Users' Group Meeting on Recent Advances in Parallel Virtual Machine and Message Passing Interface, EuroPVM/MPI 2009, held in Espoo, Finland, September 7-10, 2009.

The 27 papers presented were carefully reviewed and selected from 48 submissions. The volume also includes 6 invited talks, one tutorial, 5 poster abstracts and 4 papers from the special session on current trends in numerical simulation for parallel engineering environments. The main topics of the meeting were Message Passing Interface (MPI)performance issues in very large systems, MPI program verification and MPI on multi-core architectures.

Software Engineering Practice: A Case Study Approach is a broad discussion covering the entire software development lifecycle. It uses a comprehensive case study to address each topic and features the following: A description of the development, by the fictional company Homeowner, of the DigitalHome (DH) System, a system with "smart" devices for controlling home lighting, temperature, humidity, small appliance power, and security A set of scenarios that provide a realistic framework for use of the DH System material Just-in-time training: each chapter includes mini tutorials introducing various software engineering topics that are discussed in that chapter and used in the case study A set of case study exercises that provide an opportunity to engage students in software development practice, either individually or in a team environment. Offering a new approach to learning about software engineering theory and practice, the text is specifically designed to: Support teaching software engineering, using a comprehensive case study covering the complete software development lifecycle Offer opportunities for students to actively learn about and engage in software engineering practice Provide a realistic environment to study a wide array of software engineering topics including agile development The book supports a student-centered, "active" learning style of teaching. The DH case study exercises provide a variety of opportunities for students to engage in realistic activities related to the theory and practice of software engineering. The text uses a fictitious team of software engineers to portray the nature of software engineering and to depict what actual engineers do when practicing software engineering. All the DH cases study exercises can be used as team or group exercises in collaborative learning. Many of the exercises have specific goals related to team building and teaming skills. The text also can be used to support professional development or certification of practicing software engineers. The case study exercises can be integrated with presentations in a workshop or short course for professionals.

This book constitutes the thoroughly refereed and revised proceedings of the 9th International Workshop on Computational Logic for Multi-Agent Systems, CLIMA IX, held in Dresden, Germany, in September 2008 and co-located with the 11th European Conference on Logics in Artificial Intelligence, JELIA 2008.

The 8 full papers, presented together with two invited papers, were carefull selected from 18 submissions and passed through two rounds of reviewing and revision. Topics addressed in the regular papers include the use of automata-based techniques for verifying agents' conformance with protocols, and an approach based on the C+ action description language to provide formal specifications of social processes such as those used in business processes and social networks. Other topics include casting reasoning as planning and thus providing an analysis of reasoning with resource bounds, a discussion of the formal properties of Computational Tree Logic (CTL) extended with knowledge operators, and the use of argumentation in multi-agent negotiation. The invited contributions discuss complexity results for model-checking temporal and strategic properties of multi-agent systems, and the challenges in design and development of programming languages for multi-agent systems.

This volume contains the proceedings of the 21st International Conference on Computer-Aided Veri?cation (CAV) held in Grenoble, France, between June 28 and July 2, 2009. CAV is dedicated to the advancement of the theory and practice of computer-aided formal analysis methods for hardware and software systems. Its scope ranges from theoretical results to concrete applications, with an emphasis on practical veri?cation tools and the underlying algorithms and techniques. Everyinstanceofaconferenceisspecialinitsownway.ThisCAVisspecialfor at least two reasons: ?rst, it took place in Grenoble, the place where the CAV series started 20 years ago. Secondly, there was a particularly large number of paper submissions: 135 regular papers and 34 tool papers, summing up to 169 submissions. They all went through an active review process, with each submissionreviewedbyfourmembersoftheProgramCommittee.Wealsosought external reviews from experts in certain areas. Authors had the opportunity to respond to the initial reviews during an author response period. All these inputs wereusedbytheProgramCommitteeinselectinga?nalprogramwith36 regular papers and 16 tool papers. In addition to the presentation of these papers, the program included the following: - Four invited tutorials: Rachid Guerraoui (EPFL Lausanne, Switzerland): Transactional M- ory: Glimmer of a Theory. Jaeha Kim (Stanford, USA): Mixed-Signal System Veri?cation: A High- Speed Link Example. Jean Krivine (Institut des Hautes Etudes Scienti?ques, France): M- elling Epigenetic Information Maintenance: A Kappa Tutorial. JosephSifakis (CNRS-VERIMAG, France): Component-BasedConstr- tion of Real-Time Systems in BIP."

OpenMP is an application programming interface (API) that is widely accepted as a de facto standard for high-level shared-memory parallel programming. It is a portable, scalable programming model that provides a simple and ?exible interface for developing shared-memory parallel applications in Fortran, C, and C++. Since its introduction in 1997, OpenMP has gained support from the - jority of high-performance compiler and hardware vendors. Under the direction of the OpenMP Architecture Review Board (ARB), the OpenMP speci?cation is undergoing further improvement. Active research in OpenMP compilers, r- time systems, tools, and environments continues to drive OpenMP evolution.To provideaforumforthedisseminationandexchangeofinformationaboutand- periences with OpenMP, the community of OpenMP researchersand developers in academia and industry is organized under cOMPunity (www.compunity.org). This organization has held workshops on OpenMP since 1999. This book contains the proceedings of the 5th International Workshop on OpenMP held in Dresden in June 2009. With sessions on tools, benchmarks, applications, performance and runtime environments it covered all aspects of the current use of OpenMP. In addition, several contributions presented p- posed extensions to OpenMP and evaluated reference implementations of those extensions. An invited talk provided the details on the latest speci?cation dev- opment inside the Architecture Review Board. Together with the two keynotes about OpenMP on hardware accelerators and future generation processors it demonstrated that OpenMP is suitable for future generation systems.